1. Field of the Invention
The present invention relates to a data transfer control device and electronic equipment comprising the same.
2. Description of Related Art
An interface standard called IEEE 1394 has recently been attracting much attention. This IEEE 1394 has standardized high-speed serial bus interfaces that can handle the next generation of multimedia devices. IEEE 1394 makes it possible to handle data that is required to have real-time capabilities, such as moving images. A bus in accordance with IEEE 1394 can be connected not only to peripheral equipment for computers, such as printers, scanners, CD-R drives, and hard disk drives, but also to domestic appliances such as video cameras, VTRs, and TVs. This standard is therefore expected to enable a dramatic acceleration of the digitalization of electronic equipment.
The concept of IEEE 1394 is disclosed in various publications, such as xe2x80x9cAn outline of the IEEE 1394 High Performance Serial Busxe2x80x9d (Interface, April 1996, pages 1 to 10), xe2x80x9cBus Standers for PC Peripheral Equipmentxe2x80x9d (Interface, January 1997, pages 106 to 116), and xe2x80x9cReal-Time Transfer Modes and Multimedia-Capable Protocols for IEEE 1394-1995 (FireWire)xe2x80x9d (Interface, January 1997, pages 136 to 146). Texas Instruments"" TSB12LV31 is known as a data transfer control device that conforms to IEEE 1394.
However, some technical problems have been identified with such a data transfer control device conforming to IEEE 1394, as described below.
That is to say, the current IEEE 1394 standard does make it possible to implement transfer speeds up to a maximum of 400 Mbps in practice, however, the presence of processing overheads forces the actual transfer speeds of entire system to be much slower. In other words, the firmware and application software running on a CPU require large amounts of time for processes such as preparing for transmitting data and reading in received data, which means it is not possible to implement high-speed data transfer overall, no matter how fast the data can be transferred over the IEEE 1394.
A particular problem lies in the fact that a CPU incorporated into peripheral equipment has a lower processing capability than the CPU incorporated into the host system, such as a personal computer. This makes the problem of processing overheads in the firmware and application software extremely serious. It is therefore desirable to provide techniques that are capable of efficiently solving this overhead problem.
The present invention was devised in the light of the above described technical problem, and has as an objective thereof the provision of a data transfer control device and electronic equipment using the same which are capable of reducing the processing overheads of firmware and application software, thus implementing high-speed data transfer within a compact hardware.
In order to solve the above described technical problems, a first aspect of the present invention relates to a data transfer control device for transferring data among a plurality of nodes that are connected to a bus, the data transfer control device comprising: link means for providing a service for transferring packets between nodes; storage means for storing packets, the storage means being randomly accessible; write means for writing to the storage means a packet that is being transferred from each of the nodes via the link means; and read means for reading out a packet that has been written to the storage means by an upper layer, and transferring-the packet to the link means.
With this aspect of the invention, packets that are being transferred from another node are written by the write means to a randomly accessible storage means. Packets that have been written to the storage means by an upper layer, such as firmware or application software, are read out by the read means and transferred to the link means. They are then transferred to other nodes Thus, in accordance with the present invention, the randomly accessible storage means for storing packets is interposed between the link means and the upper layers. This configuration makes it possible to store packets in any desired storage area within the storage means, regardless of the reception sequence or transmission sequence of the packets. This also makes it possible to divide the packets and store the resultant parts in a plurality of areas within the storage means.
In a second aspect of the present invention, the storage means is divided into a control information area for storing packet control information and a data area for storing packet data. This arrangement makes it possible to reduce the processing load on the firmware or application software in the upper layers, thus enabling an improvement in the actual transfer speeds of the entire system. It also simplifies the processing for reading packets from the storage means and writing packets to the storage means.
In a third aspect of the present invention, the storage means is divided into an area in which a packet is stored and a work area for a central processing unit. This reduces the storage capacity required of the local memory of the central processing unit; possibly even removing the need for local memory completely.
In a fourth aspect of the present invention, the control information area of the storage means is divided into a control information area for reception and a control information area for transmission. This arrangement makes it possible to read packet control information continuously from the control information area for reception and also write packet control information continuously to the control information area for transmission, simplifying the processing and reducing the processing load.
A fifth aspect of the present invention further comprises packet division means for writing packet control information to the control information area and writing packet data to the data area. This ensures that packet control information and packet data are automatically written to the control information area and data area, respectively, enabling a reduction in overheads in the upper layers, such as firmware.
In a sixth aspect of this invention, the link means generates tag information for delimiting at least control information and data of a packet, and also links the tag information to a packet, and the packet division means writes packet control information to the control information area and writes packet data to the data area, based on the tag information that has been linked to the packet. This arrangement makes it possible to store packet control information in the control information area and data in the data area, with a simple hardware configuration.
In a seventh aspect of this invention, the data area of the storage means is divided into a data area for reception and a data area for transmission. This arrangement makes it possible to read out receive data continuously from the data area for reception and write transmission data continuously to the data area for transmission, enabling a reduction in processing overheads on the upper layers.
In an eighth aspect of this invention, the data area of the storage means is divided into a data area for isochronous transfer and a data area for asynchronous transfer. This arrangement makes it possible to ensure that an isochronous packet has priority in processing, even if the isochronous packet has been transferred after an asynchronous packet. It is therefore possible to maintain the real-time capabilities of processing required for isochronous transfers.
In a ninth aspect of this invention, the data area of the storage means comprises a data area for asynchronous transfer; and the data area for asynchronous transfer is divided into a plurality of areas including first and second data areas for asynchronous transfer. This arrangement makes it possible to store data having different purposes in a plurality of areas within the data area for asynchronous transfer. In other words, control-related data such as command data and status data can be stored in the first data area for asynchronous transfer, for example, and data such as data that is to be output, stored, or taken in by an application can be stored in the second data area for asynchronous transfer. It is therefore possible to store data that is to be output, stored, or taken in by an application, continuously in the second data area for asynchronous transfer, enabling a reduction in the processing load on the upper layers
In a tenth aspect of this invention, the data area of the storage means is divided into a data area for isochronous transfer and a first data area for asynchronous transfer, and the data area for isochronous transfer is used as a second data area for asynchronous transfer. This means that the data area for isochronous transfer can be used as the second data area for asynchronous transfer, when an application does not use isochronous transfers. In addition, data for different purposes can be stored separately in the first and second data areas for asynchronous transfer. As a result, it is possible to reduce the processing load on the upper layers, while utilizing limited resources efficiently.
In an eleventh aspect of this invention, the data area of the storage means is divided into a plurality of areas; and the data transfer control device further comprises means for writing packet data to any one of the divided areas, based on packet control information. This arrangement makes it possible to store data for different purposes separately in a plurality of separated areas. As a result, the processing load on the upper layers can be reduced.
A twelfth aspect of this invention further comprises means for variably controlling a size of each area, when the storage means is divided into a plurality of areas. This enables the optimal area partitioning in accordance with the application, making it possible to utilize limited resources efficiently.
In a thirteenth aspect of this invention, a size of each of the areas can be controlled variably and dynamically after power has been applied. This makes it possible to utilize limited resources efficiently, even when reception processing and transmission processing are mixed together.
In a fourteenth aspect of this invention, on condition that the storage means is divided into a plurality of areas, at least one of packet control information and packet data is stored within a divided area from a first boundary to a second boundary thereof, and the storage point of the at least one of packet control information and packet data returns to the first boundary when said storage point reaches the second boundary. This arrangement makes it possible for a randomly accessible storage means to have a function of FIFO. When the storage point reaches the second boundary, the packet control information and data can be stored from the first boundary, making it possible to utilize limited resources efficiently.
In a fifteenth aspect of this invention, a size of an area for storing at least one of control information and data of one packet is fixed. This simplifies the handling of packets by the firmware or the like, enabling a reduction in the processing loads on the firmware or the like.
Note that this invention may comprise for a FIFO for reception and a FIFO for transmission that are provided between the link means and the storage means.
In a sixteenth aspect of this invention, the data transfer control device comprises: a first bus connected to a next stage application; a second bus for controlling the data transfer control device; a third bus connected electrically to a physical-layer device; a fourth bus connected electrically to the storage means; and arbitration means for performing arbitration for establishing a data path between any one of the first, second, and third buses and the fourth bus.
In this aspect of the invention, mutually separate first, second, and third buses are provided. The arbitration performed by the arbitration means sets up a data path between one of the first, second, and third buses and the fourth bus. This arrangement makes it possible to store packets that have been received from another node via a physical-layer device, in any desired disposition within the storage means. In addition, the reading and writing of packet control information is done using the second bus, so that the first bus can be used for reading and writing the data in the packets. This enables a reduction in the processing load on the upper layers, such as the transaction layer and application layer. It also makes it possible to utilize low-speed buses as the first and second buses and a low-speed, inexpensive device as the device for controlling the data transfer control device As a result, the data transfer control device can be made more compact and less expensive
Note that it is sufficient to connect electrically the first, second, third, and fourth buses to the application, a device for controlling the data transfer control device, physical-layer device, and storage means respectively, and other devices can exist on these buses.
It is preferable that data transfer according to this invention is performed in accordance with the IEEE 1394 standard.
Electronic equipment in accordance with this invention comprises any one of the above-described data transfer control devices; a device for performing given processing on data that has been received from another node via the data transfer control device and the bus; and a device for outputting or storing data that has been subjected to said processing. Electronic equipment in accordance with a further aspect of this invention comprises: any one of the above described data transfer control devices; a device for performing given processing on data that is to be sent to another node via the data transfer control device and the bus; and a device for taking in data to be subjected to said processing.
With these aspects of the invention, it is possible to speed up the processing in the electronic equipment for outputting or storing data that has been transferred from another node, or the processing the electronic equipment for transferring data that has been taken in to another node. These aspects of the invention make it possible to make the data transfer control device more compact and also reduce the processing loads on firmware that controls the data transfer, thus making it possible to produce electronic equipment that is less expensive and more compact.